1. Field of the Invention
The present invention relates to a latch circuit and a semiconductor device.
The present invention relates to a latch circuit and a semiconductor device including the latch circuit. Note that the semiconductor device in this specification indicates all the devices that operate by utilizing semiconductor characteristics.
2. Description of the Related Art
A latch circuit is a circuit that can temporarily hold a specific logic state (hereinafter also referred to as data), and is used in a variety of semiconductor devices. For example, a latch circuit is used as a circuit that temporarily holds data when the data is written or read to/from a storage circuit provided in a semiconductor device.
The latch circuit can be constituted by logic gates. For example, a D latch circuit illustrated in FIG. 13 is known.
In the latch circuit constituted by logic gates as illustrated in FIG. 13, stored data is lost when power supply is stopped. In addition, a large number of semiconductor elements (such as transistors) are required to form the latch circuit.
Further, a latch circuit can be constituted by a non-volatile ferroelectric element (see Patent Document 1). In that case, data can be held in the ferroelectric element even when power supply is stopped. However, when the ferroelectric element is used, deterioration of data retention characteristics due to the increase in the number of rewrite operations tends to be obvious.